1. Field of the Invention
The present invention relates to a semiconductor device and a method of its fabrication, and more particularly to connection for multilevel metallization.
2. Description of the Related Art
Wiring is increasingly gaining significance for the reliability and the performance of semiconductor integrated circuits (ICs) in connection with current industry trends that are moving towards miniaturization. Problems in the wiring arise due to the Joule effect in conductor regions, which generates heating produced by the flow of current through a resistance of the conductor regions, and to electromigration (EM), for which the wiring can be completely destroyed. In order to avoid this, particular care must be exercised to avoid high and non-uniform electrical resistances in a wiring process that should be suitable for dimensions in the 0.4 xcexcm range, for example, because of the high current densities that occur therein.
Reductions of conductor line (interconnect) widths and distances, and contact hole (via) diameters are demanded to realize higher packing densities in semiconductor ICs. A contact hole (via) having a greater depth to width ration (xe2x80x9caspect ratioxe2x80x9d) is also demanded. Reduction of line widths results in increase in sheet resistance of the lines. Increase in sheet resistance needs to be suppressed without increasing thickness of film forming the lines. This is because increasing the film thickness results in increased coupling capacity (parasitic capacity) between the adjacent lines. Increased coupling capacity causes a drop in high-speed operation of semiconductor ICs. The thickness of the line forming film must be set as small as possible within an allowable range for current densities required for interconnects in higher-level.
For manufacturing interconnection in the 0.4 micron range, constrictions at the upper level interconnect to contact plug interface must be prevented. However, misalignment will reduce overlapping area. Specifically, there occurs exposure of portion of upper end of contact plug by the upper level interconnect due to misalignment. If a tungsten film constitutes a major part of a contact plug and an aluminum alloy film constitutes a major part of an upper level interconnect, the interconnect exhibits more susceptibility to electromigration at area where current flows into the interconnect from the contact plug. When electromigration occurs, voids form in the aluminum alloy film within the area right above the contact plug and in the neighborhood thereof. Resistivity of the interconnect increases because charged carriers cannot pass through the voids. This degrades the reliability of the upper level interconnects. Electromigration of aluminum atom provides flow of electric charge in the same direction as flow of electric current. It increases as electric densities through upper level interconnects increase. The boundary surface between the upper level interconnect and contact plug restricts the flow rate of electric charge of the electromigration. The area at the interface of the upper level interconnect to the upper end of the contact plug is less than the area of the upper end of the contact plug due to the misalignment. This means that the electric density at the interface is always higher than the electric density at the remote portion of the interconnect from the interface. The restriction and the local increase of electric density at the interface cause increased occurrence of electromigration at the interface.
This increase may be suppressed if a spacer of conductive film is formed over the sidewalls of the upper level interconnects. But, distances among the interconnects become small, increasing the coupling (parasite) capacity, decreasing high-speed operation of the semiconductor IC.
The reduction in area at the interface of the interconnection to the contact plug causes increased resistance at the interface. Thus, power consumption is high at the upper level interconnects within the area where the electromigration tends to occur.
An object of the present invention is to suppress occurrence of electromigration at the interface of interconnect to contact plug without any substantial increase in coupling capacity between interconnects as well as suppression of increase in power consumption.
According to one aspect of the present invention, there is provided a semiconductor device comprising:
a substrate having a surface;
a plurality of lower level interconnects over or above said surface of said substrate;
an interlayer insulating film covering said plurality of lower level interconnects, said interlayer insulating film having an upper flat surface portion and a plurality of contact holes disposed in said upper flat surface portion and opening to said plurality of lower level interconnects;
a plurality of contact plugs, each filling one of said plurality of contact holes and directly connected with the associated one of said plurality of lower level interconnects at a bottom end portion thereof,
each of said plurality of contact plugs including a tungsten film and a first barrier conductive film that has a predetermined thickness, said bottom end portion of each of said plurality of contact plugs being in direct contact with the associated one of said plurality of lower level interconnects and formed with said first barrier conductive film; and
a plurality of upper level interconnects formed on said interlayer insulating film and connected with said plurality of lower level interconnects by said plurality of contact plugs,
each of said plurality of upper level interconnects including aluminum film, said aluminum film being in direct contact with and covering an upper end of the associated one of said plurality of contact plugs,
each of said plurality of upper level interconnects also including aluminum alloy film formed on said upper flat surface portion of said interlayer insulating film, said aluminum alloy film being in direct contact with said aluminum film at an area right above the upper end of the associated one of said plurality of contact plugs.
According to further aspect of the present invention, there is provided a semiconductor device comprising:
a substrate having a surface;
a plurality of lower level interconnects over or above said surface of said substrate;
an interlayer insulating film covering said plurality of lower level interconnects, said interlayer insulating film having an upper flat surface portion and a plurality of contact holes disposed in said upper flat surface portion and opening to said plurality of lower level interconnects;
a plurality of contact plugs, each filling one of said plurality of contact holes and directly connected with the associated one of said plurality of lower level interconnects at a bottom end portion thereof,
each of said plurality of contact plugs including a tungsten film and a first barrier conductive film that has a predetermined thickness, said bottom end portion of each of said plurality of contact plugs being in direct contact with the associated one of said plurality of lower level interconnects and formed with said first barrier conductive film; and
a plurality of upper level interconnects formed on said interlayer insulating film and connected with said plurality of lower level interconnects by said plurality of contact plugs,
each of said plurality of upper level interconnects including an aluminum alloy film extending over said upper flat surface portion of said interlayer insulating film and an aluminum film, said aluminum film being in direct contact with and covering sides of said aluminum alloy film at areas extending right above an upper end of the associated one of said plurality of contact plugs and in the neighborhood thereof.
According to still further aspect of the present invention, there is provided a semiconductor device comprising:
a substrate having a surface;
a plurality of lower level interconnects over or above said surface of said substrate;
an interlayer insulating film covering said plurality of lower level interconnects, said interlayer insulating film having an upper flat surface portion and a plurality of contact holes disposed in said flat surface portion and opening to said plurality of lower level interconnects;
a plurality of upper level interconnects formed on said interlayer insulating film and connected with said plurality of lower level interconnects via said plurality of contact holes,
each of said upper level interconnects including an aluminum alloy film with a predetermined thickness;
said interlayer insulating film having a plurality of recesses, said plurality of recesses being recessed from said flat surface portion and communicating with said plurality of contact holes, respectively,
each of said plurality of recesses being recessed from said flat surface portion and having an aperture occupying an area of said flat surface portion, which area is adapted to be covered by the associated one of said plurality of upper interconnects,
said aperture of each of said plurality of recesses extending in a first direction, in which the associated one upper level interconnect runs, by a predetermined length and also in a second direction, which crosses said first direction, by a predetermined width,
each of said plurality of recesses having a bottom spaced less from said flat surface portion than an upper surface of the associated one of said plurality of lower level interconnect;
a plurality of contact plugs, each filling one of said plurality of contact holes and one of said plurality of recesses which communicates therewith, each of said plurality of contact plugs being in direct contact with the associated one of said plurality of lower level interconnects at a bottom end portion thereof,
each of said plurality of contact plugs including a tungsten film and a barrier conductive film with a predetermined thickness, said bottom end portion of each of said plurality of contact plugs being formed with said barrier conductive film,
each of said plurality of contact plugs including a boundary portion in direct contact with said bottom of the associated one of said plurality of recesses, said boundary portion being formed with said barrier conductive film.
According to another aspect of the present invention, there is provided a method of fabrication of a semiconductor device, comprising the steps of:
providing a substrate having a surface;
forming a plurality of lower level interconnects over or above said surface of said substrate;
depositing an interlayer insulating film over said surface of said substrate and said plurality of lower level interconnects, said interlayer insulating film having a flat surface portion extending over said plurality of lower level interconnects;
forming a plurality of contact holes within said interlayer insulating film, each opening to one of said plurality of lower level interconnects;
forming a first barrier conductive film surface-wide;
depositing, by chemical vapor deposition, a tungsten film surface-wide;
removing, by chemical mechanical polishing, portions of said tungsten film and said first barrier conductive film from said flat surface portion of said interlayer insulating film to form contact plugs filling said contact holes, respectively;
forming an aluminum cap over each of ends of said contact plugs in a self-alignment manner;
forming an aluminum alloy film, with a first predetermined thickness, surface-wide;
forming a second barrier conductive film surface-wide; and
patterning, by anisotropic etching, at least said second barrier conductive film and said aluminum alloy film to form a plurality of upper level interconnects.
According to still another aspect of the present invention, there is provided a method of fabrication of a semiconductor device, comprising the steps of:
providing a substrate having a surface;
forming a plurality of lower level interconnects over or above said surface of said substrate;
depositing an interlayer insulating film over said surface of said substrate and said plurality of lower level interconnects, said interlayer insulating film having a flat surface portion extending over said plurality of lower level interconnects;
forming a plurality of contact holes within said interlayer insulating film, each opening to one of said plurality of lower level interconnects;
forming, by sputtering, a first barrier conductive film surface-wide;
depositing, by chemical vapor deposition, a tungsten film surface-wide;
removing, by chemical mechanical polishing, portions of said tungsten film and said first barrier conductive film from said flat surface portion of said interlayer insulating film to form contact plugs filling said contact holes, respectively;
forming a second barrier conductive film, having a first predetermined thickness, surface-wide;
forming an aluminum alloy film, having a second predetermined thickness, surface-wide;
forming a third barrier conductive film, having a third predetermined thickness, surface-wide;
forming an insulating film surface-wide;
patterning, by anisotropic etching, said insulating film;
patterning, by anisotropic etching, said third barrier conductive film, said aluminum alloy film and said second barrier conductive film to form a patterned laminated structure; and
placing a photoresist formed with an opening right above at least one of the ends of said contact plugs and in the neighborhood thereof;
forming, by chemical vapor deposition using said photoresist as a mask, aluminum film over sides of said patterned laminated structure to form a plurality of upper level interconnects.
According to yet another aspect of the present invention, there is provided a method of fabrication of a semiconductor device, comprising the steps of:
providing a semiconductor substrate having a surface;
forming a plurality of lower level interconnects over or above said surface of said substrate;
depositing an interlayer insulating film of silicon oxide over said surface of said substrate and said plurality of lower level interconnects, said interlayer insulating film having a flat surface portion extending over said plurality of lower level interconnects;
forming a silicon nitride film over said interlayer insulating film;
forming a plurality of contact holes within said interlayer insulating film, each opening to one of said plurality of lower level interconnects;
forming, by sputtering, a first titanium nitride film surface-wide;
depositing, by chemical vapor deposition, a tungsten film surface-wide;
removing, by chemical mechanical polishing, portions of said tungsten film and said first titanium nitride film from said flat surface portion of said interlayer insulating film to form contact plugs filling said contact holes, respectively;
forming a second titanium nitride film, having a first predetermined thickness, surface wide;
forming, by sputtering, an aluminum alloy film, having a second predetermined thickness, surface-wide;
forming a titanium tungsten film, having a third predetermined thickness, surface-wide;
forming a first silicon oxide film surface-wide;
patterning, by anisotropic etching, said first silicon oxide film and said titanium tungsten film to form silicon oxide caps and then patterning, by anisotropic etching, said aluminum alloy film and said second titanium nitride film to form a plurality of laminated structures;
forming a second silicon oxide film surface-wide;
etching back said second silicon oxide film to form a silicon oxide spacer over side surfaces of each of said laminated structures;
placing a photoresist formed with an opening right above at least one of the ends of said contact plugs and in the neighborhood thereof;
removing, by etching using said photoresist as a mask and buffer hydrofluoric acid as echant, portions of said silicon oxide caps, said silicon oxide spacers, and said titanium tungsten film; and
forming, by chemical vapor deposition using said photoresist as a mask, aluminum film over exposed sides of said laminated structure and exposed portion of said upper ends of said plurality of contact plugs to form a plurality of upper level interconnects.
According to still yet further aspect of the present invention, there is provided a method of fabrication of a semiconductor device, comprising the steps of:
providing a substrate having a surface;
forming a plurality of lower level interconnects over or above said surface of said substrate;
depositing an interlayer insulating film over said surface of said substrate and said plurality of lower level interconnects, said interlayer insulating film having a flat surface portion extending over said plurality of lower level interconnects;
forming a plurality of recesses inward from said flat surface portion of said interlayer insulating film, each of said plurality of recesses being recessed from said flat surface portion and having an aperture occupying an area of said flat surface portion, which area is adapted to be covered by the associated one of a plurality of upper interconnects to be formed on said flat surface portion of said interlayer insulating film,
said aperture of each of said plurality of recesses extending in a first direction, in which the associated one upper level interconnect runs, by a predetermined length and also in a second direction, which crosses said first direction, by a predetermined width,
each of said plurality of recesses having a bottom spaced less from said flat surface portion than an upper surface of the associated one of said plurality of lower level interconnects;
forming a plurality of contact holes through said interlayer insulating film, each extending through the bottom of the associated one of said plurality of recesses and opening to one of said plurality of lower level interconnects;
forming, by sputtering, a first barrier conductive film surface-wide;
depositing, by chemical vapor deposition, a tungsten film surface-wide;
removing, by chemical mechanical polishing, portions of said tungsten film and said first barrier conductive film from said flat surface portion of said interlayer insulating film to form contact plugs, each filling one of said contact holes and the associated one of said plurality of recesses;
forming a second barrier conductive film, having a first predetermined thickness, surface-wide;
forming, by sputtering, an aluminum alloy film, having a second predetermined thickness, surface-wide;
forming a third barrier conductive film, having a third predetermined thickness, surface wide; and
patterning, by anisotropic etching, said second third barrier conductive film, said aluminum alloy film, and said second barrier conductive film to form a plurality of upper level interconnects.